Emerging package assemblies may include embedded bridge interconnection to provide faster communication between dies such as, for example, processors and memory chips. Current technologies used to fabricate first level interconnection (FLI) between dies and the bridge to enable higher performance computing may be reaching size constraint limitations. For example, as dies continue to shrink to smaller dimensions, a finer pitch is generally needed between interconnect structures at the FLI level. The finer pitch of emerging dies may be pushing alignment capabilities of current lithography processes used to fabricate the FLI structures. Decreasing the pitch between FLI structures may further result in defects such as bridging.